Title :
A novel vertical MOSFET with bMPI structure for 1T-DRAM application
Author :
Chen, Cheng-Hsin ; Lin, Jyi-Tsong ; Eng, Yi-Chuen ; Lin, Po-Hsieh ; Chiu, Hsien-Nan ; Chang, Tzu-Feng ; Tai, Chih-Hsuan ; Lu, Kuan-Yu ; Fan, Yi-Hsuan ; Chang, Yu-Che ; Chen, Hsuan-Hsu
Author_Institution :
Dept. of Electr. Eng., Nat. Sun Yat-Sen Univ. (NSYSU EE), Kaohsiung, Taiwan
Abstract :
This paper proposes a novel vertical MOSFET with the middle partial insulation and block oxide (bMPI) structure for 1T-DRAM application. The bMPI 1T-DRAM can increase the pseudo-neutral region due to the bMPI under the vertical channel and its device sensing current window is improved about 95% when compared to the planer bMPI 1T-DRAM. Because of the double gate structure, the proposed device has great gate controllability; hence, it can reduce the short-channel effects and enhance the electrical characteristics.
Keywords :
DRAM chips; MOSFET; 1T-DRAM application; bMPI structure; double gate structure; electrical characteristics; middle partial insulation and block oxide; pseudo-neutral region; short-channel effects; vertical MOSFET; Fabrication; Implants; Logic gates; Oxidation; Performance evaluation; Random access memory; Writing; 1T-DRAM; Capacitorless; Vertical; bMPI;
Conference_Titel :
Next-Generation Electronics (ISNE), 2010 International Symposium on
Conference_Location :
Kaohsiung
Print_ISBN :
978-1-4244-6693-1
DOI :
10.1109/ISNE.2010.5669180
