• DocumentCode
    1664792
  • Title

    A true multistandard, programmable, low-power, full HD video-codec engine for smartphone SoC

  • Author

    Mehendale, Mahesh ; Das, Subrangshu ; Sharma, Mohit ; Mody, Mihir ; Reddy, Ratna ; Meehan, Joseph ; Tamama, Hideo ; Carlson, Brian ; Polley, Mike

  • Author_Institution
    Texas Instrum., Bangalore, India
  • fYear
    2012
  • Firstpage
    226
  • Lastpage
    228
  • Abstract
    In this paper, we present IVA-HD, a true multistandard, programmable, full HD video coding engine which adopts optimal hardware-software partitioning to achieve the low-power and area requirements of the OMAP 4 processor. Unlike the approach of using separate IPs for encoder and decoder, IVA-HD uses an integrated codec engine which is area efficient, as most of the decoder logic is reused for the encoder. IVA-HD is architected to perform stream-rate and pixel- rate processing in a single pipeline (that processes one 16x16 macroblock at a time), so as to support the latency requirements of video conferencing.
  • Keywords
    decoding; pipeline processing; smart phones; system-on-chip; teleconferencing; video codecs; video coding; IP; IVA-HD; OMAP 4 processor; decoder logic; integrated codec engine; multistandard programmable low-power full HD video-codec engine; optimal hardware-software partitioning; pixel-rate processing; smartphone SoC; stream-rate processing; video conferencing; Bandwidth; Decoding; Encoding; Engines; High definition video; Standards; Streaming media;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2012 IEEE International
  • Conference_Location
    San Francisco, CA
  • ISSN
    0193-6530
  • Print_ISBN
    978-1-4673-0376-7
  • Type

    conf

  • DOI
    10.1109/ISSCC.2012.6176986
  • Filename
    6176986