DocumentCode
1665275
Title
5.3-ps ECL and 71-GHz static frequency divider in self-aligned SEG SiGe HBT
Author
Ohue, Eiji ; Hayami, Reiko ; Oda, Katsuya ; Shimamoto, Hiromi ; Washio, Katsuyoshi
Author_Institution
Central Res. Lab., Hitachi Ltd., Tokyo, Japan
fYear
2001
fDate
6/23/1905 12:00:00 AM
Firstpage
26
Lastpage
29
Abstract
An ECL gate with a delay time of 5.3 ps, the fastest yet reported for semiconductor technology, and based on a self-aligned SiGe HBT with an optimized SEG structure was developed. Maximum operating frequency of static frequency divider using this structure is up to 71 GHz
Keywords
Ge-Si alloys; bipolar logic circuits; delays; emitter-coupled logic; frequency dividers; heterojunction bipolar transistors; logic gates; semiconductor materials; 5.3 ps; 71 GHz; ECL; SiGe; delay time; operating frequency; self-aligned SEG HBT; static frequency divider; Capacitance; Cutoff frequency; Delay; Electrodes; Frequency conversion; Germanium silicon alloys; Heterojunction bipolar transistors; Optical frequency conversion; Semiconductor films; Silicon germanium;
fLanguage
English
Publisher
ieee
Conference_Titel
Bipolar/BiCMOS Circuits and Technology Meeting, Proceedings of the 2001
Conference_Location
Minneapolis, MN
Print_ISBN
0-7803-7019-8
Type
conf
DOI
10.1109/BIPOL.2001.957850
Filename
957850
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