DocumentCode :
1665357
Title :
A dual 23Gb/s CMOS transmitter/receiver chipset for 40Gb/s RZ-DQPSK and CS-RZ-DQPSK optical transmission
Author :
Cui, Delong ; Raghavan, Bharath ; Singh, Ullas ; Vasani, Anand ; Huang, Zhi ; Pi, Deyi ; Khanpour, Mehdi ; Nazemi, Ali ; Maarefi, Hassan ; Ali, Tamer ; Huang, Nick ; Zhang, Wei ; Zhang, Bo ; Momtaz, Afshin ; Cao, Jun
Author_Institution :
Broadcom, Irvine, CA, USA
fYear :
2012
Firstpage :
330
Lastpage :
332
Abstract :
This paper presents the first CMOS dual bitrate chipset with equalization in transmitter and receiver as well as a clock to data skew adjustment. Both the transmitter and the receiver consume less power than those in previously published results in the works of Hosida et al. (2007).
Keywords :
CMOS integrated circuits; integrated optoelectronics; optical modulation; optical transceivers; quadrature phase shift keying; CMOS receiver chipset; CMOS transmitter; CS-RZ-DQPSK; bit rate 23 Gbit/s; bit rate 40 Gbit/s; clock to data skew adjustment; optical transmission; receiver; transmitter-receiver equalization; CMOS integrated circuits; Clocks; Jitter; Optical filters; Optical transmitters; Receivers; Solid state circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2012 IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0193-6530
Print_ISBN :
978-1-4673-0376-7
Type :
conf
DOI :
10.1109/ISSCC.2012.6177006
Filename :
6177006
Link To Document :
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