Title :
A 20Mb/s phase modulator based on a 3.6GHz digital PLL with −36dB EVM at 5mW power
Author :
Marzin, Giovanni ; Levantino, Salvatore ; Samori, Carlo ; Lacaita, Andrea
Author_Institution :
Politec. di Milano, Milan, Italy
Abstract :
This paper introduces a digital-intensive phase modulator circuit, which is able to enforce an arbitrary carrier phase change (up to ±π radians) in one clock sample. For a clock frequency of 40MHz, the modulation error, expressed in terms of error vector magnitude (EVM), is below -36dB for a 20Mb/s QPSK-modulated or a 10Mb/s GMSK-modulated carrier at 3.6GHz.
Keywords :
digital phase locked loops; modulators; quadrature phase shift keying; radio transmitters; GMSK; QPSK; bit rate 10 Mbit/s; bit rate 20 Mbit/s; digital PLL; digital-intensive phase modulator circuit; error vector magnitude; frequency 3.6 GHz; frequency 40 MHz; modulation error; power 5 mW; quadrature phase shift keying; Delay; Frequency modulation; Phase locked loops; Phase modulation; Tuning; Wideband;
Conference_Titel :
Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2012 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4673-0376-7
DOI :
10.1109/ISSCC.2012.6177007
