Title :
Skewed-Load Transition Test: Part II, Coverage
Author :
Patil, Srinivas ; Savir, Jacob
Keywords :
Capacitance; Circuit faults; Circuit testing; Clocks; Combinational circuits; Jacobian matrices; Latches; Logic circuits; Logic testing; Propagation delay;
Conference_Titel :
Test Conference, 1992. Proceedings., International
Print_ISBN :
0-7803-0760-7
DOI :
10.1109/TEST.1992.527893
