Realization of storage elements in gate arrays

Digital gate arrays usually consist of a large number of transistor pairs. It is very convenient for the use of combinational logic and sequential logic, but not suitable for storage elements. The very common case is that a system to be integrated includes not only logic cell, but also memory matrix. This paper analyzes the features of ROM, RAM and digital gate array and presents some ways to integrate the storage elements into the gate array chips. An example of transforming ROM array into practical ASIC chips is given, and the results show the method is adoptable