DocumentCode
1665988
Title
Low-voltage low-power topology for high-speed applications
Author
Foroudi, Navid ; Fulga, S. ; Suppiah, Puhalrajan ; Peirce, John N M
Author_Institution
SiGe Semicond., Ottawa, Ont., Canada
fYear
2001
fDate
6/23/1905 12:00:00 AM
Firstpage
135
Lastpage
138
Abstract
A low-voltage low-power logic architecture is introduced that uses capacitors to enhance high-frequency performance. A divide-by-32/33 BiCMOS dual-modulus frequency divider based on the proposed architecture operates at 2.5 GHz with a 3.15 mW power consumption from a 1.65 V power supply. Simulations show that, compared to conventional bipolar current-mode logic (CML) with the same supply current, the proposed architecture can operate at lower supply voltages
Keywords
BiCMOS logic circuits; current-mode logic; frequency dividers; high-speed integrated circuits; low-power electronics; 1.65 V; 2.5 GHz; 3.15 mW; BiCMOS dual-modulus frequency divider; LV logic architecture; current-mode logic; high-frequency performance; high-speed applications; low-power digital circuits; low-power logic architecture; low-voltage operation; modified CML technique; BiCMOS integrated circuits; Capacitors; Energy consumption; Impedance; Logic devices; Low voltage; MOS devices; Operational amplifiers; Tail; Topology;
fLanguage
English
Publisher
ieee
Conference_Titel
Bipolar/BiCMOS Circuits and Technology Meeting, Proceedings of the 2001
Conference_Location
Minneapolis, MN
Print_ISBN
0-7803-7019-8
Type
conf
DOI
10.1109/BIPOL.2001.957875
Filename
957875
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