• DocumentCode
    1666034
  • Title

    A 0.18 μm BiCMOS technology featuring 120/100 GHz (fT/fmax) HBT and ASIC-compatible CMOS using copper interconnect

  • Author

    Joseph, A. ; Coolbaugh, D. ; Zierak, M. ; Wuthrich, R. ; Geiss, P. ; He, Z. ; Liu, X. ; Orner, B. ; Johnson, J. ; Freeman, G. ; Ahlgren, D. ; Jagannathan, B. ; Lanzerotti, L. ; Ramachandran, V. ; Malinowski, J. ; Chen, H. ; Chu, J. ; Gray, P. ; Johnson, R

  • Author_Institution
    Microelectron. Div., IBM Corp., Essex Junction, VT, USA
  • fYear
    2001
  • fDate
    6/23/1905 12:00:00 AM
  • Firstpage
    143
  • Lastpage
    146
  • Abstract
    A BiCMOS technology is presented that integrates a high performance NPN (fT=120 GHz and fmax=100 GHz), ASIC compatible 0.11 μm Leff CMOS, and a full suite of passive elements. Significant HBT performance enhancement compared to previously published results has been achieved through further collector and base profile optimization guided by process and device simulations. Base transit time reduction was achieved by simultaneously increasing the Ge ramp and by limiting the base diffusion with the addition of carbon doping to SiGe epitaxial base. This paper describes IBM´s next generation SiGe BiCMOS production technology targeted at the communications market
  • Keywords
    BiCMOS integrated circuits; Ge-Si alloys; application specific integrated circuits; heterojunction bipolar transistors; high-speed integrated circuits; integrated circuit interconnections; integrated circuit technology; semiconductor device models; semiconductor materials; semiconductor process modelling; 0.11 micron; 0.18 micron; 100 GHz; 120 GHz; 120/100 GHz HBT; ASIC-compatible CMOS; Cu; Ge ramp; HBT performance enhancement; IBM next generation SiGe BiCMOS production technology; SiGe; SiGe BiCMOS technology; SiGe:C; SiGe:C epitaxial base; base diffusion; base profile optimization; base transit time reduction; carbon doping; collector profile optimization; communications market; copper interconnect; device simulation; high performance NPN; passive elements; process simulation; BiCMOS integrated circuits; Boron; CMOS process; CMOS technology; Doping; Germanium silicon alloys; Heterojunction bipolar transistors; Implants; Resistors; Silicon germanium;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Bipolar/BiCMOS Circuits and Technology Meeting, Proceedings of the 2001
  • Conference_Location
    Minneapolis, MN
  • Print_ISBN
    0-7803-7019-8
  • Type

    conf

  • DOI
    10.1109/BIPOL.2001.957877
  • Filename
    957877