A scaleable model generation methodology of bipolar transistors for RFIC design

This paper presents a scaleable model generation methodology of bipolar transistors. Although the methodology has been targeted towards the compact model HICUM, it can also be applied to an appropriate subcircuit extension of the conventional SPICE Gummel-Poon model (SGPM), thereby allowing its usage in any environment. The methodology enables a generation of extensive model libraries containing transistor models for a large variation of geometry configurations available in a given technology. Such a library is mandatory for RF integrated circuit (RFIC) design, since proper transistor sizing is required to meet the stringent requirements of wireless consumer applications. Modeling results for transistors of a production RF BiCMOS process are presented, demonstrating excellent agreement over a wide range of geometries and bias conditions. A circuit level verification with a Bluetooth RF front-end device is also provided as an example of first-pass design success enabled by the described methodology