DocumentCode :
1666367
Title :
The optimization of LBC6 power/mixed-signal IC BiCMOS process
Author :
Nehrer, W. ; Brito, J.C. ; Debolske, T. ; Efland, T. ; Fleischmann, P. ; Hannaman, D. ; Higgins, R. ; Hutter, L. ; McNutt, M. ; Mindricelu, E. ; Pendharkar, S. ; Smith, J. ; Taylor, R.V.
Author_Institution :
Mixed Signal Process Dev., Texas Instrum. Inc., Dallas, TX, USA
fYear :
2001
fDate :
6/23/1905 12:00:00 AM
Firstpage :
192
Lastpage :
195
Abstract :
A 30 V, 0.5 μm, triple level metal (TLM) + thick top copper metal, power-BiCMOS technology for Hard Disk Drive (HDD) servo applications is described. Based on a die area analysis, a vital few components and process features were optimized over the prior-generation process, resulting in a 40% die size reduction for typical products. Insight into this optimization effort is provided
Keywords :
BiCMOS integrated circuits; circuit optimisation; integrated circuit design; integrated circuit technology; mixed analogue-digital integrated circuits; power integrated circuits; 0.5 micron; 30 V; LBC6 BiCMOS process; die area analysis; die size reduction; hard disk drive servo applications; optimization; power/mixed-signal IC process; thick top Cu metal; triple level metal; BiCMOS integrated circuits; Bonding; CMOS technology; Costs; Isolation technology; Optimized production technology; Process design; Product design; Signal processing; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Bipolar/BiCMOS Circuits and Technology Meeting, Proceedings of the 2001
Conference_Location :
Minneapolis, MN
Print_ISBN :
0-7803-7019-8
Type :
conf
DOI :
10.1109/BIPOL.2001.957888
Filename :
957888
Link To Document :
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