A 0.55V 61dB-SNR 67dB-SFDR 7MHz 4th-order Butterworth filter using ring-oscillator-based integrators in 90nm CMOS

Integrators are key building blocks in many analog signal processing circuits and systems. They are typically implemented using either an opamp-RC or a G_m-C architecture depending on bandwidth and linearity requirements. The performance of both these topologies depends on the operational transconductance amplifier (OTA) used to implement the integrator. Reduced supply voltage and lower transistor output impedance make it difficult to implement high-gain wide-bandwidth OTAs in a power-efficient manner. Consequently, the DC gain of the integrator is often severely limited when designed in deep-submicron CMOS processes. Conventional integrators employ multi-stage OTAs operating in weak inversion and forward body biasing to achieve large DC gain at low supply voltages [1]. These techniques require automatic biasing to guarantee robust operation under all conditions and the use of frequency compensation combined with large dimensions needed to bias the transistors in weak inversion severely limits the bandwidth and increases power dissipation. In this paper, we propose a ring-oscillator-based integrator (ROI) that seeks to overcome the limitations of conventional OTA-based integrators.