A 256×256 CMOS image sensor with ΔΣ-based single-shot compressed sensing

Low power consumption is a primary concern in many CMOS image-sensor applications. As the resolution of these sensors has increased while maintaining or increasing their frame rates, A/D conversion has become the dominant component of power consumption [1]. Conventional image compression can help reduce the readout rate [2] (and hence its power consumption), but cannot reduce the A/D conversion power consumption, since it is performed after all pixel values have been converted to the digital domain.