DocumentCode
1666857
Title
A massively parallel GP engine in VLSI
Author
Eklund, Sven E.
Author_Institution
Comput. Sci. Dept., Dalarna Univ., Sweden
Volume
1
fYear
2002
Firstpage
629
Lastpage
633
Abstract
In this paper we propose the implementation of a massively parallel genetic programming (GP) model in hardware in order to speed up the genetic algorithm. This fine-grained diffusion architecture consists of a large amount of independent processing nodes that evolve a large number of small, overlapping subpopulations. Every node has an embedded CPU that executes a linear machine code GP representation at a rate of up to 20,000 generations per second
Keywords
VLSI; genetic algorithms; mathematics computing; parallel architectures; VHDL simulations; VLSI; diffusion model; genetic algorithm; genetic programming; linear machine code; massively parallel architecture; search space; Centralized control; Computer architecture; Computer science; Engines; Genetic algorithms; Genetic programming; Hardware; Stochastic processes; Topology; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Evolutionary Computation, 2002. CEC '02. Proceedings of the 2002 Congress on
Conference_Location
Honolulu, HI
Print_ISBN
0-7803-7282-4
Type
conf
DOI
10.1109/CEC.2002.1006999
Filename
1006999
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