DocumentCode :
1667739
Title :
System testability evaluation with STA
Author :
Maroufi, Walid ; Marzouki, Meryem
Author_Institution :
LIP6 Lab., Paris, France
fYear :
1998
fDate :
6/20/1905 12:00:00 AM
Firstpage :
79
Abstract :
This paper presents a Computer Aided Testability tool named STA (System Testability Assistant), aimed at proposing a testability strategy for systems as early as possible in the design process. Given a system description, STA first compiles it in order to create system, boards, and circuits objects, and then proceeds bottom-up, from the circuit to the system, in order to evaluate the actual testability of the whole system, recommend a testability strategy and testability features inclusion in some modules, and provides support for including these testability features in the system by calling external generators or synthesis for testability tools
Keywords :
controllability; design for testability; electronic design automation; object-oriented methods; observability; STA computer aided testability tool; System Testability Assistant; bottom-up procedure; system description; system testability evaluation; testability strategy; Circuit synthesis; Circuit testing; Costs; Hardware; Laboratories; Modeling; Process design; Software systems; Software testing; System testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics, 1998. ICM '98. Proceedings of the Tenth International Conference on
Conference_Location :
Monastir
Print_ISBN :
0-7803-4969-5
Type :
conf
DOI :
10.1109/ICM.1998.825573
Filename :
825573
Link To Document :
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