Control and communication performance analysis of embedded DSP systems in the MASIC methodology

The time required by an embedded system to process in formation does not only depend on the amount of data; it also depends heavily on the synchronization overhead, bus protocol and communication architecture. The paper presents a technique to estimate the performance of the control and communication part of an embedded system modeled using the MASIC methodology. A key concept in MASIC is the strict separation of the computation part from the control and communication. Based on this clear separation of concerns, the estimator analyzes the communication delay. Our method targets applications with intense, but regular data flow with a fair amount of complex control. Examples are base stations, or mobile terminals. For these applications, the method allows a cycle accurate estimation of the delay due to the communication. Hence, different architectures can be evaluated and e.g. the effect of different bus arbitration and different DMA block sizes can be assessed. Thus, the proposed method is an aid for the designer to explore the system with different system level decisions.