DocumentCode :
166795
Title :
Improving microcontroller (MCU) immunity performance to system-level ESD/EFT testing through PCB system co-design methodology
Author :
Murugan, Rajen ; Jie Chen ; Minhong Mi ; Basile, Bart ; Jae Park
Author_Institution :
Texas Instrum. Inc., Dallas, TX, USA
fYear :
2014
fDate :
7-12 Sept. 2014
Firstpage :
1
Lastpage :
9
Abstract :
In this paper we described a PCB system co-design modeling methodology that can be implemented, early in the system design phase, to improve system-level immunity performance in the presence of IEC electromagnetic transient disturbances. The methodology is validated through correlation to laboratory measurements on a TI MSP430™ microcontroller PCB system.
Keywords :
electrostatic discharge; microcontrollers; printed circuit design; ESD/EFT testing; IEC electromagnetic transient disturbances; PCB system co-design methodology; TI MSP430 microcontroller PCB system; system design phase; system-level immunity performance; Couplings; Discharges (electric); Electrostatic discharges; IEC; Impedance; Transient analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD), 2014 36th
Conference_Location :
Tucson, AZ
ISSN :
0739-5159
Type :
conf
Filename :
6968834
Link To Document :
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