Title :
Soft-Delay-Error Evaluation in Content-Addressable Memory
Author :
Onizawa, Naoya ; Matsunaga, Shinichiro ; Sakimura, Noboru ; Nebashi, Ryusuke ; Sugibayashi, Tadahiko ; Hanyu, Takahiro
Author_Institution :
Frontier Res. Inst. for Interdiscipl. Sci., Tohoku Univ., Sendai, Japan
Abstract :
In this paper, a delay-variation effect under alpha-particle strikes is evaluated in content-addressable memories (CAMs). The particle strikes into transistors induce a current-pulse signal that causes the delay variation, resulting in a timing error, called a soft-delay error (SDE). The delay variations in two different CAMs designed in a 90nm CMOS technology are simulated in NS-SPICE using a charge-injection model that generates a current-pulse signal. The SDE effects are discussed, where one of the CAMs is a traditional 9-transistor-cell CAM and the other one is a magnetic-tunnel-junction (MTJ)/MOS hybrid CAM that operates based on a multiple-valued current-mode logic. The simulation results show that there is a trade-off between the amount of current (thus power dissipation) and the SDE effects in the MTJ/MOS hybrid CAM.
Keywords :
CMOS integrated circuits; SPICE; content-addressable storage; multivalued logic; 9-transistor-cell CAM; 90nm CMOS technology; NS-SPICE; SDE; alpha-particle strikes; charge-injection model; content-addressable memory; current-pulse signal generation; delay-variation effect; magnetic-tunnel-junction-MOS hybrid CAM; multiple-valued current-mode logic; power dissipation; soft-delay-error evaluation; timing error; Cams; Computer aided manufacturing; Delays; MOSFET; Magnetic tunneling; Resistance; CAM; associative memory; magnetic-tunnel-junction (MTJ) device; nonvolatile memory; single-event upset (SEU); soft error;
Conference_Titel :
Multiple-Valued Logic (ISMVL), 2014 IEEE 44th International Symposium on
Conference_Location :
Bremen
DOI :
10.1109/ISMVL.2014.46