Title :
Differential-Time and Pulse-Amplitude Modulation Signaling for Serial Link Transceivers
Author :
Rashdan, M. ; Haslett, J.W.
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Calgary, Calgary, AB, Canada
Abstract :
A Pulse-Amplitude-Modulated Differential-Time-Signaling (PAM-DTS) Architecture for serial communication links is presented in this paper. The proposed link utilizes multi-level pulse-amplitude modulation (PAM) as-well-as multi-level pulse-position modulation (PPM) of the rising and the falling edges of the input clock signal, and uses one transmission channel to transmit the data as well as the clock. Applying the amplitude modulation to the DTS transmitted signal efficiently increases the link rate without significantly affecting the signal bandwidth. A 65nm CMOS example of a 6-bit 9Gb/s PAM-DTS link has been designed and simulated using 1.5GHz as an input clock signal. The simulated power consumption of the transmitter and the receiver combination is less than 22mW.
Keywords :
CMOS integrated circuits; pulse amplitude modulation; pulse position modulation; telecommunication signalling; transceivers; CMOS process; DTS transmitted signal; PAM-DTS architecture; PAM-DTS link; PPM; bit rate 9 Gbit/s; frequency 1.5 GHz; input clock signal; link rate; multilevel pulse-position modulation; power consumption; pulse-amplitude-modulated differential-time-signaling architecture; receiver; serial communication links; serial link transceivers; signal bandwidth; size 65 nm; transmission channel; transmitter; word length 6 bit; Amplitude modulation; Bandwidth; Clocks; Demodulation; Receivers; Transmitters; Differential time signalling; PAM; PPM; Serial links; TDC;
Conference_Titel :
Multiple-Valued Logic (ISMVL), 2014 IEEE 44th International Symposium on
Conference_Location :
Bremen
DOI :
10.1109/ISMVL.2014.51
