DocumentCode
166829
Title
An Algorithm for Constructing a Minimal Register with Non-linear Update Generating a Given Sequence
Author
Nan Li ; Dubrova, Elena
Author_Institution
R. Inst. of Technol. (KTH), Stockholm, Sweden
fYear
2014
fDate
19-21 May 2014
Firstpage
254
Lastpage
259
Abstract
Registers with Non-Linear Update (RNLUs) are a generalization of Non-Linear Feedback Shift Registers (NLFSRs) in which both, feedback and feedforward, connections are allowed and no chain connection between the stages is required. An RNLU can be used to generate any given 2p-ary sequence, p ≥ 1. In this paper, a new algorithm for constructing RNLUs is presented. Expected size of RNLUs constructed by the presented algorithm is proved to be asymptotically smaller than the expected size of RNLUs constructed by previous algorithms generating the same sequence. The presented algorithm can potentially be useful for applications such as testing, wireless communications, and cryptography.
Keywords
shift registers; 2p-ary sequence; NLFSR; RNLU; cryptography; feedback connection; feedforward connection; nonlinear feedback shift registers; register-nonlinear update; wireless communication; Algorithm design and analysis; Boolean functions; Clocks; Generators; Logic gates; Shift registers; Vectors; LFSR; NLFSR; Sequence generation; binary machine; circuit-size complexity;
fLanguage
English
Publisher
ieee
Conference_Titel
Multiple-Valued Logic (ISMVL), 2014 IEEE 44th International Symposium on
Conference_Location
Bremen
ISSN
0195-623X
Type
conf
DOI
10.1109/ISMVL.2014.52
Filename
6845030
Link To Document