A switched capacitors track&hold circuit for subsampling applications

Author

Vasseaux, T. ; Huyart, B. ; Loumeau, P. ; Benzerti, W.

Author_Institution

Ecole Nat. Superieure des Telecommun., Paris, France

fYear

1998

fDate

6/20/1905 12:00:00 AM

Firstpage

215

Lastpage

218

Abstract

The growing need for dense wireless communication circuits in the frequency range of 900 MHz, has forced IC designers to find alternative receivers to the superheterodyne architecture. Among these alternatives, the direct-conversion by subsampling system should be promising because it offers a high level of integration. However, due to sampling noise and aperture jitter this architecture is certainly restricted to applications which do not need high performance. In this paper a switched capacitor track&hold suitable in a front-end of a subsampling receiver will be described. The circuit has been designed in a 0.6 μm MOS technology. It works under 3.3 V and with a clock frequency of 25 MHz. Simulation results show that the circuit could track a signal as high as 900 MHz

Keywords

MOS analogue integrated circuits; UHF integrated circuits; radio receivers; sample and hold circuits; signal sampling; switched capacitor networks; 0.6 micron; 3.3 V; 900 MHz; IC design; MOS technology; aperture jitter; circuit simulation; direct conversion; front-end; sampling noise; subsampling receiver; switched capacitor track and hold circuit; wireless communication; Apertures; Communication switching; Frequency; Integrated circuit noise; Jitter; MOS capacitors; Sampling methods; Switched capacitor circuits; Switching circuits; Wireless communication;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronics, 1998. ICM '98. Proceedings of the Tenth International Conference on

Conference_Location

Monastir

Print_ISBN

0-7803-4969-5

Type

conf

DOI

10.1109/ICM.1998.825603

Filename

825603