80nm SOI CMOS parameter extraction for BSIMPD

Partially depleted SOI (PDSOI) CMOS is promising technology for high performance and low power applications. Recently a BSIMPD model was developed and reported by Su et al (2000) and Fung et al (2000). However, parameter extraction still remains one of the difficulties compared with that of bulk devices due to the floating body and self-heating effect. This paper describes a simple parameter extraction flow and successful simulation results using 130 nm CMOS technology with small-gate length down to 79 nm.