A fully integrated SoC for 802.11b in 0.18 μm CMOS

Author

Darabi, H. ; Khorram, S. ; Zhou, Z. ; Li, T. ; Marholev, B. ; Chiu, J. ; Castaneda, J. ; Chien, E. ; Anand, S. ; Wu, S. ; Pan, M. ; Roufoogaran, R. ; Kim, H. ; Lettieri, P. ; Ibrahim, B. ; Rael, J. ; Tran, L. ; Geronaga, E. ; Yeh, H. ; Frost, T. ; Trachew

Author_Institution

Broadcom, Irvine, CA, USA

fYear

2005

Firstpage

96

Abstract

A 0.18 μm CMOS IEEE 802.11b SoC integrated all the radio building blocks including the PA, the PLL loop filter, and the antenna switch, as well as the complete physical layer and the MAC sections. At 2.4 GHz, it dissipates 165 mW in the receive-mode and 360 mW in the transmit-mode from a 1.8 V supply. The receiver achieves a typical NF of 6 dB, and -88 dBm sensitivity at 11 Mbit/s rate. The transmitter delivers a nominal output power of 13 dBm.

Keywords

CMOS integrated circuits; IEEE standards; UHF power amplifiers; phase locked loops; radio receivers; radio transmitters; system-on-chip; transceivers; wireless LAN; 0.18 micron; 1.8 V; 11 Mbit/s; 165 mW; 2.4 GHz; 360 mW; 6 dB; CMOS; IEEE 802.11b; MAC sections; PA; PLL loop filter; antenna switch; fully integrated SoC; physical layer; radio building blocks; receiver; transmitter; Baseband; Clocks; Decision feedback equalizers; Electronics packaging; Filters; Impedance matching; Radio transmitters; Switches; Transceivers; Wireless LAN;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International

Conference_Location

San Francisco, CA

ISSN

0193-6530

Print_ISBN

0-7803-8904-2

Type

conf

DOI

10.1109/ISSCC.2005.1493886

Filename

1493886