Title :
Characterization and simulation of STI isolation for 0.1 /spl mu/m partially-depleted SOI devices
Author :
Fenouillet-Beranger, C. ; Faynot, O. ; Tabone, C. ; Colladant, T. ; Ferlet, V. ; Jahan, C. ; du Port de Pontcharra, J. ; Lecarval, G. ; Pelloie, J.L.
Author_Institution :
Lab d´Electron. et de Technol. de l´Inf., CEA, Centre d´Etudes Nucleaires de Grenoble, France
Abstract :
This study puts forward the facts that the most important parameter for the STI optimization is the rounded shape of the back STI. It decreases the lateral parasitic corner effect near the buried oxide. The combination of a STI isolation with a deep retrograde channel implantation should practically lead to the elimination of the parasitic lateral effect. By this method, the front and back short channel effects are also reduced.
Keywords :
MOSFET; elemental semiconductors; ion implantation; isolation technology; semiconductor device measurement; semiconductor device models; silicon; silicon-on-insulator; 0.1 micron; SOI MOSFETs; STI isolation; Si-SiO/sub 2/; back short channel effects; buried oxide; deep retrograde channel implantation; front channel effects; lateral parasitic corner effect; optimization; parasitic lateral effect; partially-depleted SOI devices; shallow trench isolation; simulation; Analytical models; Conductive films; Implants; Isolation technology; MOSFETs; Manufacturing; Oxidation; Semiconductor films; Silicon; Threshold voltage;
Conference_Titel :
SOI Conference, 2001 IEEE International
Conference_Location :
Durango, CO, USA
Print_ISBN :
0-7803-6739-1
DOI :
10.1109/SOIC.2001.957998
