Title :
Ar implantation effects in SOI NMOSFET´s under low voltage operation
Author :
Shino, T. ; Nii, H. ; Kawanaka, S. ; Inoh, K. ; Katsumata, Y. ; Yoshimi, M. ; Ishiuchi, H.
Author_Institution :
Syst. LSI Res. & Dev. Center, Toshiba Corp., Yokohama, Japan
Abstract :
To reduce the parasitic bipolar gain of an SOI device, several techniques have been proposed. This paper reveals the advantage and disadvantage of Ar implant plus shallow S/D technique, highlighting process, temperature. and frequency dependent device characteristics of V/sub D/ below 1.5V.
Keywords :
MOSFET; argon; elemental semiconductors; ion implantation; semiconductor device measurement; silicon; silicon compounds; silicon-on-insulator; 1.5 V; Ar implant; Ar implantation effects; SOI NMOSFETs; Si:Ar-SiO/sub 2/; frequency dependent device characteristics; low voltage operation; parasitic bipolar gain; process dependent device characteristics; shallow S/D technique; temperature dependent device characteristics; Argon; Capacitance; History; Impact ionization; Implants; Lighting; Low voltage; MOSFET circuits; Temperature dependence; Virtual colonoscopy;
Conference_Titel :
SOI Conference, 2001 IEEE International
Conference_Location :
Durango, CO, USA
Print_ISBN :
0-7803-6739-1
DOI :
10.1109/SOIC.2001.957999
