• DocumentCode
    1669251
  • Title

    In place growth of vertical Si nanowires for surround gated MOSFETs with self aligned contact formation

  • Author

    Lugstein, A. ; Steinmair, M. ; Henkel, C. ; Bertagnolli, E.

  • Author_Institution
    Inst. for Solid State Electron., Vienna Univ. of Technol., Vienna, Austria
  • fYear
    2010
  • Firstpage
    1138
  • Lastpage
    1139
  • Abstract
    We demonstrate the simultaneous vertical integration of self contacting and highly oriented nanowires (NWs) into airbridge structures. With the use of conventional semiconductor processing techniques and vapour-liquid-solid (VLS) growth a suspended vertical NW architecture is formed on a silicon on insulator (SOI) substrate where the nanodevice will later be fabricated on. The VLS grown Si-NWs are contacted to prepatterned airbridges by a self aligned process and there is no need for post-growth NW assembly or alignment. To demonstrate the potential of this method surround gated vertical MOSFETs have been fabricated with a highly simplified integration scheme combining top-down and bottom-up approaches.
  • Keywords
    MOSFET; elemental semiconductors; nanowires; silicon; silicon-on-insulator; substrates; Si; airbridge structures; self aligned contact formation; semiconductor processing techniques; silicon on insulator substrate; surround gated MOSFET; vapour-liquid-solid growth; vertical Si nanowires; vertical integration; Assembly; Electrodes; Fabrication; Lithography; MOSFETs; Nanoscale devices; Nanowires; Optoelectronic and photonic sensors; Silicon on insulator technology; Substrates;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Nanoelectronics Conference (INEC), 2010 3rd International
  • Conference_Location
    Hong Kong
  • Print_ISBN
    978-1-4244-3543-2
  • Electronic_ISBN
    978-1-4244-3544-9
  • Type

    conf

  • DOI
    10.1109/INEC.2010.5424987
  • Filename
    5424987