Author :
Fujiyoshi, Toshihide ; Shiratake, Shinichiro ; Nomura, Shuou ; Nishikawa, Tsuyoshi ; Kitasho, Yoshiyuki ; Arakida, Hideho ; Okuda, Yuji ; Tsuboi, Yoshiro ; Hamada, Mototsugu ; Hara, Hiroyuki ; Fujita, Tetsuya ; Hatori, Fumitoshi ; Shimazawa, Takayoshi ; Y
Abstract :
A single-chip H.264/MPEG-4 audio/visual LSI for mobile applications with a module-wise dynamic voltage/frequency scaling architecture is described. This LSI operates even during the voltage/frequency transition with no performance overhead by using a dynamic de-skewing system and an on-chip voltage regulator with slew-rate control. The IC consumes 90mW in decoding QVGA H.264 video at 15f/s and MPEG-4 AAC LC audio simultaneously.
Keywords :
audio coding; data compression; decoding; large scale integration; mobile computing; multimedia communication; video codecs; video coding; voltage regulators; 90 mW; AAC LC audio; H.264/MPEG-4; QVGA H.264 video; audio/visual CODEC LSI; decoding; dynamic de-skewing system; mobile applications; module-wise dynamic voltage/frequency scaling; on-chip voltage regulator; slew-rate control; voltage/frequency transition; Codecs; Control systems; Decoding; Dynamic voltage scaling; Frequency; Large scale integration; MPEG 4 Standard; Regulators; System-on-a-chip; Voltage control;
