ASIP design of a reconfigurable channel estimator for OFDM systems

Progress in wireless communications has led to an increasing number of standards such as WIMAX, 3GPP-LTE, DVB-T, DVB-H and more. This work presents a reconfigurable channel estimation engine for OFDM systems. The engine can support multiple channel estimation algorithms for many wireless standards. It can also support both 1D and 2D channel estimation algorithms. This is important because the large performance gain of 2D over 1D channel estimation algorithms, which can be up to 5dBs. Moreover, 1D algorithms are less complex than 2D algorithms and they are the best choice when there is a need to reduce the receiver processing power. The engine does not use any dividers for least square pilots estimation, and hence, the least square pilot estimator engine is less complex than other engines. Although the engine was designed and optimized for channel estimation algorithms, it can also be configured as an FFT engine, FIR engine and many more. The engine was synthesized on Altera Startix III EP3SC150 FPGA and performs the estimation process in 94 μsecond for the worst case parameters in all supported standards.