Title :
Characterization of fully depleted SOI transistors after removal of the silicon substrate
Author :
Burns, Jack ; Warner, Keith ; Gouker, Pascale
Author_Institution :
Lincoln Lab., MIT, Lexington, MA, USA
Abstract :
FDSOI technology is compatible with the construction of three-dimensional integrated circuits. Removal of the silicon substrate, an essential step in the 3D assembly technology, will not cause an increase in off-state current provided the wafer bond technology is compatible with a 400/spl deg/C sinter. Substrate removal will also decrease the effect of ionizing radiation on transistor properties.
Keywords :
CMOS integrated circuits; MOSFET; elemental semiconductors; radiation effects; silicon; silicon-on-insulator; sintering; substrates; 3D assembly technology; 3D integrated circuits; 400 C; FDSOI technology; Si; Si substrate removal; fully depleted SOI transistors; ionizing radiation effect; off-state current; sintering; wafer bond technology; CMOS technology; Circuit testing; Etching; Integrated circuit technology; Ionizing radiation; Plasma applications; Plasma stability; Silicon; Substrates; Wafer bonding;
Conference_Titel :
SOI Conference, 2001 IEEE International
Conference_Location :
Durango, CO, USA
Print_ISBN :
0-7803-6739-1
DOI :
10.1109/SOIC.2001.958012
