Efficient model for delay estimation of MWCNT interconnects

This paper investigates different aspects of the use of MWCNTs as chip interconnects. Simulations were made to compare the performance of MWCNT and Cu at global, intermediate and local interconnect levels. We studied the effect of different geometry parameters of MWCNT on its propagation delay, and introduced a semi-analytical model to estimate its propagation delay. We deployed this model to study the buffer insertion technique in MWCNT interconnects. Simulation results confirm the accuracy and efficiency of the model compared to equivalent circuit model of MWCNT. The results also show that the MWCNT interconnect requires lower buffer numbers compared to Cu wire.