Title :
A 200×160 pixel CMOS fingerprint recognition SoC with adaptable column-parallel processors
Author :
Kim, Seong-Jin ; Lee, Kwang-Hyun ; Han, Sang-Wook ; Yoon, Euisik
Author_Institution :
KAIST, Daejeon, South Korea
Abstract :
A CMOS fingerprint recognition SoC with embedded column-parallel processors is optimized for 2D digital image processing. The processor employs self-configuration features for adaptive filter operations and the pixel includes a sensing block, ADC and frame memory without area penalty. The total image processing time is less than 360 ms at 10 MHz.
Keywords :
CMOS image sensors; adaptive filters; adaptive signal processing; fingerprint identification; image processing equipment; parallel processing; system-on-chip; 10 MHz; 160 pixel; 200 pixel; 2D digital image processing; 32000 pixel; 360 ms; ADC; CMOS fingerprint recognition SoC; adaptable column-parallel processors; adaptive filter operations; area penalty; frame memory; image processing time; pixel sensing block; processor self-configuration features; CMOS image sensors; CMOS process; Digital images; Electrodes; Filters; Fingerprint recognition; Image processing; Pixel; Sensor arrays; Sensor systems;
Conference_Titel :
Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-8904-2
DOI :
10.1109/ISSCC.2005.1493963
