Nano-wires for room temperature operated hybrid CMOS-NANO integrated circuits

Author

Ecoffey, Serg ; Pott, Vincent ; Bouvet, Didier ; Mazza, Marco ; Mahapatra, Santanu ; Schmid, Alexandre ; Leblebici, Yusuf ; Declercq, Michel J. ; Ionescu, Adrian M.

Author_Institution

Swiss Fed. Inst. of Technol., Lausanne, Switzerland

fYear

2005

Firstpage

260

Abstract

N-doped polysilicon gated-nanowires (poly-SiNW) are reported. The V-shape and hysteresis of their I-V characteristics are used to build analog and memory circuit cells. Integration of the poly-SiNW in CMOS is demonstrated. A precise current-measurement application with 1pA resolution and negative differential resistor is reported. A nanoscale capacitor-less hysteresis memory cell using constant-current biased poly-SiNW is designed and experimentally validated.

Keywords

CMOS analogue integrated circuits; CMOS memory circuits; electric current measurement; nanowires; CMOS; I-V characteristics; N-doped polysilicon gated-nanowires; V-shape; analog circuit; constant-current biased poly-SiNW; current measurement; hybrid CMOS-NANO integrated circuits; memory circuit cells; nanoscale capacitor-less hysteresis memory cell; negative differential resistor; room temperature operation; CMOS integrated circuits; CMOS memory circuits; CMOS technology; Current measurement; Energy consumption; Hybrid integrated circuits; Hysteresis; Input variables; Temperature; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International

Conference_Location

San Francisco, CA

ISSN

0193-6530

Print_ISBN

0-7803-8904-2

Type

conf

DOI

10.1109/ISSCC.2005.1493968

Filename

1493968