Title :
A 30mW 8b 200MS/s pipelined CMOS ADC using a switched-opamp technique
Author :
Kim, Hwi-Cheol ; Jeong, Deog-Kyoon ; Kim, Wonchan
Author_Institution :
Seoul Nat. Univ., South Korea
Abstract :
An 8b 200MS/s 2.8b-per-stage pipelined ADC is realized in a 0.18μm CMOS process. By using partially switched operational amplifiers, the ADC consumes 30mW from a 1.8V supply and occupies 0.15mm2. The ADC achieves 47.3dB SNDR, 55.8dB SFDR, and 7.6 ENOB for a 90MHz input at 200MS/s.
Keywords :
CMOS integrated circuits; analogue-digital conversion; operational amplifiers; 0.18 micron; 1.8 V; 30 mW; 8 bit; 90 MHz; partially switched operational amplifiers; pipelined CMOS ADC; Bandwidth; CMOS technology; Capacitors; Communication switching; Energy consumption; Mixed analog digital integrated circuits; Pipelines; Sampling methods; Switches; Voltage;
Conference_Titel :
Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-8904-2
DOI :
10.1109/ISSCC.2005.1493980
