Title :
Discrete wavelet transform architecture using fast processing elements
Author :
Huluta, Emanuil ; Petriu, Emil M. ; Das, Sunil R. ; Al-Dhaher, Abdul H.
Author_Institution :
Sch. of Inf. Technol. & Eng., Ottawa Univ., Ont., Canada
fDate :
6/24/1905 12:00:00 AM
Abstract :
The paper presents a folded architecture for the Discrete Wavelet Transform using fast processing elements. An improved design method allows the optimization of the register allocation scheme resulting in a reduction of the required hardware.
Keywords :
discrete wavelet transforms; filtering theory; signal resolution; discrete wavelet transform architecture; fast processing elements; folded architecture; hardware architecture; register allocation scheme; Design methodology; Design optimization; Discrete wavelet transforms; Filtering; Finite impulse response filter; Frequency; Low pass filters; Signal processing; Signal processing algorithms; Wavelet analysis;
Conference_Titel :
Instrumentation and Measurement Technology Conference, 2002. IMTC/2002. Proceedings of the 19th IEEE
Print_ISBN :
0-7803-7218-2
DOI :
10.1109/IMTC.2002.1007188
