Title :
Signal processor design for digital subscriber loops
Author_Institution :
NTT Transmission Syst. Lab., Kanagawa, Japan
Abstract :
The author proposes a digital signal processor for line-terminating circuits (LTCs) that is applicable to different digital-subscriber-loop transmission systems by merely changing the software. Since LTCs are used about 70% for adaptive filter processing, the processor should perform adaptive filtering efficiently. Therefore, a new architecture using multiply-add components is proposed. The performance of the proposed architecture is verified in experiments
Keywords :
ISDN; adaptive filters; computer architecture; digital communication systems; digital signal processing chips; subscriber loops; adaptive filter processing; digital signal processor; digital subscriber loops; line-terminating circuits; multiply-add components; Adaptive filters; Circuits; DSL; Echo cancellers; Electrochemical machining; Equalizers; Process design; Signal design; Signal processing; Transversal filters;
Conference_Titel :
Circuits and Systems, 1989., IEEE International Symposium on
Conference_Location :
Portland, OR
DOI :
10.1109/ISCAS.1989.100719
