Title :
A 70GHz cascaded multi-stage distributed amplifier in 90nm CMOS technology
Author :
Tsai, Ming-Da ; Wang, Huei ; Kuan, Jui-Feng ; Chang, Chih-Sheng
Author_Institution :
Nat. Taiwan Univ., Taipei, Taiwan
Abstract :
An offset-compensation method uses a peak detector and multiple tap feedback to achieve 1000× improvement in settling time compared to prior art. Measurement results for a 3.125 Gbit/s limit amplifier with 42dB gain implemented in a 0.18 μm CMOS process are presented.
Keywords :
CMOS integrated circuits; cascade networks; distributed amplifiers; feedback amplifiers; peak detectors; 0.18 micron; 3.125 Gbit/s; 42 dB; 70 GHz; 90 nm; CMOS technology; cascaded multi-stage distributed amplifier; limit amplifier; multiple tap feedback; offset-compensation method; peak detector; settling time; Bandwidth; CMOS technology; Capacitors; Coplanar waveguides; Distributed amplifiers; Frequency; Noise measurement; Performance gain; Power generation; Resistors;
Conference_Titel :
Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-8904-2
DOI :
10.1109/ISSCC.2005.1494039
