Stability Analysis of Feedback Circuits in Analog Multiplier Designs

Author

Wang, Fayan ; Huang, Zhangcai ; Li, Na ; Sun, Xuetao ; Inoue, Yasuaki

Author_Institution

Waseda Univ., Kitakyushu

fYear

2007

Firstpage

1133

Lastpage

1136

Abstract

Feedback technique based on amplifier is widely used in analog circuit designs. However, it may introduce instability. Thus it is important to analyze the stability of feedback circuits based on amplifier. In this paper, the stability analysis of feedback circuits in analog multiplier designs considering the influence of parasitic capacitance is given. Additionally, the stable conditions for feedback circuits are shown. Based on the stability analysis, an improved feedback circuit fabricated under CMOS 0.6 mum process is proposed to avoid oscillation, and the experimental results show that this proposed method can improve the stability of feedback circuits very well.

Keywords

CMOS analogue integrated circuits; analogue multipliers; circuit feedback; circuit stability; CMOS; analog circuit designs; analog multiplier designs; feedback circuits; parasitic capacitance; stability analysis; Analog circuits; CMOS process; Circuit analysis; Circuit simulation; Circuit stability; Computer simulation; Feedback circuits; Parasitic capacitance; Signal processing; Stability analysis;

fLanguage

English

Publisher

ieee

Conference_Titel

Communications, Circuits and Systems, 2007. ICCCAS 2007. International Conference on

Conference_Location

Kokura

Print_ISBN

978-1-4244-1473-4

Type

conf

DOI

10.1109/ICCCAS.2007.4348246

Filename

4348246