Sensitivity analysis of DRV for various configurations of SRAM

The present work analyses 6T, 8T and 10T SRAM cell on the basis of the Data Retention Voltage (DRV) and its variation with temperature and sizing ratios. The reduction of power supply, for reduced power dissipation, is carried out in this paper. In this paper, DRV of a 6T, 8T and 10T SRAM was measured using Cadence tools at 45nm technology. The DRV of 6T SRAM cell simulated is compared with the DRV estimated from the analytical model. A close simulated value comes out approximately equal to the DRV estimated from the model. Then the variations of temperature and device sizing were studied with different supply voltages. The least changes observed with variation in temperature and sizing when working with voltages in DRV range.