DocumentCode :
1673191
Title :
Pre-layout estimation of performance and design of basic analog circuits in stress enabled technologies
Author :
Sharma, Arvind Kumar ; Mishra, Neeraj ; Alam, Naushad ; Dasgupta, Sudeb ; Bulusu, Anand
Author_Institution :
Indian Inst. of Technol. Roorkee, Roorkee, India
fYear :
2015
Firstpage :
1
Lastpage :
6
Abstract :
In stress enabled technologies the drive strength of multi-fingered (MF) transistors varies with the number of fingers (NF) because of Layout Dependent Effect (LDE). This is an important issue because MF transistors are widely used in integrated circuits. In this paper, we investigate performance variability issues in basic analog building blocks, such as current mirrors, common source amplifiers, and single ended differential amplifiers, designed using MF transistors. We observe that, due to the layout dependent channel mechanical stress, the analog performance parameters of these building blocks vary significantly. When the NF in MF transistors varies from one to seven, we observe that the copy current in cascode current mirrors vary by ~15%. For similar change in the NF there is ~22% and ~24% change in the bandwidth (BW) and the output resistance (Rout) respectively of an nMOS common source amplifier with pMOS current source load. We observe variations of ~32% in slew rate (SR), ~28% in BW, and ~12.4% in Rout with the change in NF in a single ended differential amplifier. We model these variations as a function of NF in MF transistors since performance predictability in analog circuits is important. Finally, we designed a common source amplifier considering the impact of channel length on channel stress.
Keywords :
MOS integrated circuits; analogue integrated circuits; current mirrors; differential amplifiers; estimation theory; integrated circuit layout; internal stresses; transistor circuits; LDE; MF transistors; analog building blocks; analog performance parameters; basic analog circuits; cascode current mirrors; channel length; channel stress; common source amplifiers; copy current; drive strength; integrated circuits; layout dependent channel mechanical stress; layout dependent effect; multifingered transistors; nMOS common source amplifier; pMOS current source load; prelayout estimation; single ended differential amplifiers; slew rate; stress enabled technologies; Differential amplifiers; Fingers; MOS devices; Mirrors; Noise measurement; Stress; Transistors; Common Source Amplifier; Current Mirror; Differential Amplifier; LDE; Multi-Fingered Transistor; Stress;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design and Test (VDAT), 2015 19th International Symposium on
Conference_Location :
Ahmedabad
Print_ISBN :
978-1-4799-1742-6
Type :
conf
DOI :
10.1109/ISVDAT.2015.7208062
Filename :
7208062
Link To Document :
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