DocumentCode
1673254
Title
A reprogrammable EDGE baseband and multimedia handset SoC with 6 Mb embedded DRAM
Author
Cofler, A. ; Druilhe, F. ; Dutoit, D. ; Harrand, M.
Author_Institution
STMicroelectronics, Grenoble, France
fYear
2005
Firstpage
448
Abstract
A 0.13 μm 6M CMOS EDGE baseband and multimedia handset SoC features a 6 Mb embedded-DRAM DSP instruction memory to allow dynamic upgrade of DSP software, such as applications downloaded from the network. Full-chip standby current is 690 μA which gives 500 h complete GSM/EDGE terminal autonomy when using an 800 mAh battery.
Keywords
CMOS memory circuits; DRAM chips; cellular radio; digital signal processing chips; embedded systems; integrated circuit design; mobile handsets; multimedia communication; power consumption; system-on-chip; 0.13 micron; 500 h; 6 Mbit; 690 muA; DSP instruction memory; chip standby current; dynamic software upgrade; edge baseband SoC; embedded DRAM; multimedia handset SoC; power consumption reduction; reprogrammable handset SoC; terminal autonomy; Application software; Bandwidth; Baseband; Digital signal processing; GSM; Ground penetrating radar; Hardware; Random access memory; Telecommunication computing; Telephone sets;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International
Conference_Location
San Francisco, CA
ISSN
0193-6530
Print_ISBN
0-7803-8904-2
Type
conf
DOI
10.1109/ISSCC.2005.1494062
Filename
1494062
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