DocumentCode
167347
Title
A practical method for digitally calibrating gain error of integrated ADCs
Author
Rongbin Hu ; Yu Wen ; Xiaoying Zhang
Author_Institution
Sci. & Technol. on Analog Integrated Circuit Lab., Chongqing, China
fYear
2014
fDate
8-9 May 2014
Firstpage
17
Lastpage
19
Abstract
A kind of practical method for digitally gain calibration of ADCs is proposed. The method is given in details as well as the architecture and circuit. The method has been successfully applied on a two-channel 8-bit time-interleaved ADC. Simulation shows that the gain of the 8-bit ADC can be adjusted with a step of 0.012dB and a full scale range of about 3dB. The measurement shows that the 8-bit ADC has a SNR of 37dB and 45dB before and after calibration, respectively.
Keywords
analogue-digital conversion; calibration; measurement errors; digitally calibration gain error; gain 0.012 dB; integrated ADC; noise figure 37 dB; noise figure 45 dB; two-channel time-interleaved ADC; word length 8 bit; Signal to noise ratio; ADC; DAC; LSB; gain calibration; time interleaved;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Computer and Applications, 2014 IEEE Workshop on
Conference_Location
Ottawa, ON
Type
conf
DOI
10.1109/IWECA.2014.6845545
Filename
6845545
Link To Document