• DocumentCode
    1673752
  • Title

    Experimental results and die area efficient self-shielded on-chip vertical solenoid inductors for multi-GHz CMOS RFIC

  • Author

    Tsui, Hau-Yiu ; Lau, Jack

  • Author_Institution
    Hong Kong Univ. of Sci. & Technol., Kowloon, China
  • fYear
    2003
  • Firstpage
    243
  • Lastpage
    246
  • Abstract
    On-chip circular vertical solenoid inductors have been designed and fabricated using standard 6-metal layer CMOS process. Compared to the 4.1 nH circular planar spiral inductor on the same chip, the 4.8 nH solenoid inductor gives about 20% increase in maximum quality-factor (QF) and 50% increase in self-resonant frequency (SRF), but only occupies 20% of the area. The inductor impedance can be modeled by a simple RLC circuit valid beyond 20 GHz.
  • Keywords
    CMOS integrated circuits; Q-factor; electromagnetic shielding; inductors; radiofrequency integrated circuits; solenoids; 20 GHz; CMOS RFIC; RLC circuit model; die area efficiency; impedance; quality factor; self-resonant frequency; self-shielded on-chip circular vertical solenoid inductor; CMOS process; Frequency; Inductance; Inductors; Integrated circuit modeling; Parasitic capacitance; Radiofrequency integrated circuits; Semiconductor device modeling; Solenoids; Spirals;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Radio Frequency Integrated Circuits (RFIC) Symposium, 2003 IEEE
  • ISSN
    1529-2517
  • Print_ISBN
    0-7803-7694-3
  • Type

    conf

  • DOI
    10.1109/RFIC.2003.1213935
  • Filename
    1213935