DocumentCode
1673835
Title
A 43mW CT complex ΔΣ ADC with 23MHz of signal bandwidth and 68.8dB SNDR
Author
Yaghini, Navid ; Johns, David
Author_Institution
Toronto Univ., Ont., Canada
fYear
2005
Firstpage
502
Abstract
A low-power wide-BW CT complex ΔΣ ADC suitable for a low-IF receiver is fabricated in a 0.18 μm CMOS process and consumes 42.6mW from a 1.8V supply. The IC achieves 68.8dB SNDR and a DR of 72.5dB over a 23.0MHz band centered around 11.5MHz.
Keywords
CMOS integrated circuits; analogue-digital conversion; delta-sigma modulation; low-power electronics; 0.18 mm; 1.8 V; 23 MHz; 43 mW; CMOS process; CT complex ΔΣ ADC; low-IF receiver; low-power ADC; wide-BW ADC; Bandwidth; Capacitors; Clocks; Delay; Feedback; Frequency; Integrated circuit noise; Resonator filters; Transfer functions; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International
Conference_Location
San Francisco, CA
ISSN
0193-6530
Print_ISBN
0-7803-8904-2
Type
conf
DOI
10.1109/ISSCC.2005.1494089
Filename
1494089
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