• DocumentCode
    1673976
  • Title

    A programmable on-chip picosecond jitter-measurement circuit without a reference-clock input

  • Author

    Ishida, M. ; Ichiyama, K. ; Yamaguchi, T.J. ; Soma, M. ; Suda, M. ; Okayasu, T. ; Watanabe, D. ; Yamamoto, K.

  • Author_Institution
    Advantest, Gunma, Japan
  • fYear
    2005
  • Firstpage
    512
  • Abstract
    An on-chip jitter measurement circuit in 0.18 μm CMOS is demonstrated, using a combination of a programmable delay line, interleaving PFD, and programmable charge pumps. The method does not require a reference clock. Interleaving PFD minimizes bias errors. Measurement linearity is 3.5 μV/ps with an error of 1.03psrms for a 2GHz clock.
  • Keywords
    CMOS integrated circuits; clocks; delay lines; microprocessor chips; programmable circuits; timing jitter; 0.18 mm; 2 GHz; CMOS; bias error minimization; interleaving PFD; measurement linearity; picosecond jitter measurement; programmable charge pumps; programmable delay line; programmable on-chip circuit; Charge measurement; Charge pumps; Circuits; Clocks; Current measurement; Delay lines; Interleaved codes; Jitter; Linearity; Phase frequency detector;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International
  • Conference_Location
    San Francisco, CA
  • ISSN
    0193-6530
  • Print_ISBN
    0-7803-8904-2
  • Type

    conf

  • DOI
    10.1109/ISSCC.2005.1494094
  • Filename
    1494094
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1673976