Title :
A CMOS DLL-based 120MHz to 1.8GHz clock generator for dynamic frequency scaling
Author :
Kim, Jin-Han ; Kwak, Young-Ho ; Yoon, Seok-Ryung ; Kim, Moo-Young ; Kim, Soo-Won ; Kim, Chulwoo
Author_Institution :
Korea Univ., Seoul, South Korea
Abstract :
A DLL-based clock generator for dynamic frequency scaling is fabricated in a 0.35 μm CMOS technology. It generates clock signals ranging from 120MHz to 1.8GHz. The frequency can be dynamically changed. If the clock generator scales its output frequency dynamically by programming with the same last bit, it takes only one clock cycle to lock. The proposed clock generator has a jitter of ±6.6pspp at 1.3GHz.
Keywords :
CMOS digital integrated circuits; clocks; delay lock loops; 0.35 mm; 1.8 GHz; 120 MHz to 1.8 GHz; CMOS DLL; clock cycle; clock generator; dynamic frequency scaling; Clocks; Detectors; Frequency; Jitter; Local oscillators; Pulse circuits; Pulse generation; Pulse inverters; Pulse width modulation inverters; Signal generators;
Conference_Titel :
Solid-State Circuits Conference, 2005. Digest of Technical Papers. ISSCC. 2005 IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
0-7803-8904-2
DOI :
10.1109/ISSCC.2005.1494096
