Title :
Hot carrier reliability considerations for low Vdd CMOS technology
Author :
Jiang, Chun ; Pramanik, Dipu ; Hu, Chenming
Author_Institution :
VLSI Technol. Inc., San Jose, CA, USA
Abstract :
Hot carrier reliability for low Vdd technology and circuit operation was investigated. It is found that a degraded NMOSFET has larger Id degradation at lower Vdd operation. Moreover, I/O circuits at low Vdd have more stringent requirement for hot carrier reliability. CMOS input threshold voltage is increased after either N or P MOSFET degradation as is the output low voltage
Keywords :
CMOS integrated circuits; VLSI; hot carriers; integrated circuit measurement; integrated circuit reliability; CMOS technology; I/O circuits; circuit operation; degraded NMOSFET; hot carrier reliability; input threshold voltage; low Vdd technology; output low voltage; CMOS technology; Degradation; Delay effects; Hot carriers; Human computer interaction; Isolation technology; Low voltage; MOSFET circuits; Stress; Threshold voltage;
Conference_Titel :
Solid-State and Integrated Circuit Technology, 1995 4th International Conference on
Conference_Location :
Beijing
Print_ISBN :
0-7803-3062-5
DOI :
10.1109/ICSICT.1995.500153
