DocumentCode
167438
Title
AsHES Keynote
Author
Vetter, Jeffrey
fYear
2014
fDate
19-23 May 2014
Firstpage
907
Lastpage
907
Abstract
Summary form only given. Concerns about energy-efficiency and reliability have forced our community to reexamine the full spectrum of architectures, software, and algorithms that constitute our ecosystem. While architectures and programming models remained relatively stable for almost two decades, new architectural features, such as heterogeneous processing, nonvolatile memory, and optical interconnection networks, will demand that applications be redesigned so that they expose massive amounts of hierarchical parallelism, carefully orchestrate data movement, and balance concerns over accuracy, reliability, and time to solution. In what we have termed `co-design,´ teams of architects, software designers, and applications scientists, are working collectively to realize an integrated solution to these challenges. Not surprisingly, this design space can be massive and uncertain. To assist in this design space exploration, our team is using modeling, simulation, and measurement on prototype systems in order to assess the possible trajectories of these future systems. In this talk, I will sample these emerging technologies and discuss how we are preparing for these upcoming systems.
Keywords
parallel processing; power aware computing; software architecture; HPC co-design space; architectural features; energy efficiency; energy reliability; heterogeneous processing; hierarchical parallelism; nonvolatile memory; optical interconnection networks; programming models; Abstracts; Computer architecture; Conferences; Distributed processing; Software; Software reliability;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel & Distributed Processing Symposium Workshops (IPDPSW), 2014 IEEE International
Conference_Location
Phoenix, AZ
Print_ISBN
978-1-4799-4117-9
Type
conf
DOI
10.1109/IPDPSW.2014.233
Filename
6969478
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