• DocumentCode
    1674969
  • Title

    A 5-GHz monolithic silicon bipolar down-converter with a 3.2-dB noise figure

  • Author

    Italia, Alessandro ; Ragonese, Egidio ; Girlando, Giovanni ; Palmisano, Giuseppe

  • Author_Institution
    DIEES, Catania Univ., Italy
  • fYear
    2003
  • Firstpage
    453
  • Lastpage
    456
  • Abstract
    A monolithic 5-GHz down-converter consisting of a low noise amplifier (LNA) and a double-balanced mixer was designed using a 46-GHz-fT silicon bipolar process. The down-converter exhibits a SSB noise figure as low as 3.2 dB, a 24-dB power gain, and an input compression point of -23 dBm. It was assembled in a 4 × 4 mm = low-cost QFN 16-lead plastic package and draws only 18 mA from a 3-V power supply.
  • Keywords
    bipolar integrated circuits; elemental semiconductors; frequency convertors; integrated circuit noise; radiofrequency integrated circuits; silicon; 18 mA; 24 dB; 3 V; 3.2 dB; 5 GHz; QFN plastic package; SSB noise figure; Si; double-balanced mixer; input compression point; low-noise amplifier; monolithic down-converter; power gain; silicon bipolar process; Amplitude modulation; Impedance matching; Inductors; Linearity; Low-noise amplifiers; Noise figure; Performance gain; Radio frequency; Silicon; Wireless LAN;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Radio Frequency Integrated Circuits (RFIC) Symposium, 2003 IEEE
  • ISSN
    1529-2517
  • Print_ISBN
    0-7803-7694-3
  • Type

    conf

  • DOI
    10.1109/RFIC.2003.1213983
  • Filename
    1213983
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1674969