DocumentCode :
1675462
Title :
Design and modeling of a high-Q on-chip hairpin inductor for RFIC applications
Author :
Ni, Wan ; Yuan, Xiaojuen ; Tretiakov, Youri V. ; Groves, Robert ; Larson, Lawrence E.
Author_Institution :
IBM Microelectron., San Diego, La Jolla, CA, USA
fYear :
2003
Firstpage :
547
Lastpage :
550
Abstract :
The design and modeling of a high Q hairpin inductor is presented. The inductor is designed and fabricated using the thick top-level metal (4μm thickness, 14μm away from the substrate) in an IBM 0.5μm SiGe BiCMOS process to provide very high peak Q, approaching 27 from 2 to 4GHz, specifically for integrated voltage-controlled-oscillator (VCO) applications. A broadband lumped-element model is also developed for this structure. The modeling methodology is verified using commercial field solvers (IE3D and ADS Momentum) and hardware measured data, the results show that the derived model correlates with the EM simulation data.
Keywords :
BiCMOS analogue integrated circuits; circuit simulation; inductors; radiofrequency integrated circuits; voltage-controlled oscillators; 0.5 micron; 14 micron; 2 to 4 GHz; 4 micron; ADS Momentum; BiCMOS process; EM simulation data; IE3D; RFIC applications; SiGe; VCO; broadband lumped-element model; commercial field solvers; hardware measured data; high-Q on-chip hairpin inductor; modeling methodology; thick top-level metal; Active inductors; Computational modeling; Conductors; Dielectric substrates; Frequency; Microelectronics; Phase noise; Q factor; Radiofrequency integrated circuits; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radio Frequency Integrated Circuits (RFIC) Symposium, 2003 IEEE
ISSN :
1529-2517
Print_ISBN :
0-7803-7694-3
Type :
conf
DOI :
10.1109/RFIC.2003.1214005
Filename :
1214005
Link To Document :
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