Title :
Challenges in Designing Low-Power CMOS Wireless Systems-on-a-Chip
Author_Institution :
Atheros Commun. Inc., Santa Clara, CA
Abstract :
This paper describes the challenges in designing low-power CMOS systems-on-a-chip for wireless communications. RF transceiver building blocks for signal amplification, frequency translation, and frequency selectivity are examined with special emphasis on low noise amplifier, power amplifier, mixer, and frequency synthesizer. System-on-a-chip integration issues to relevant to a low-power CMOS design are also discussed
Keywords :
CMOS integrated circuits; frequency synthesizers; low noise amplifiers; low-power electronics; mixers (circuits); mobile communication; power amplifiers; system-on-chip; transceivers; RF transceiver; frequency selectivity; frequency synthesizer; frequency translation; low noise amplifier; low-power CMOS systems-on-a-chip; mixer; power amplifier; signal amplification; wireless communications; Baseband; CMOS technology; Circuits; Frequency synthesizers; Low-noise amplifiers; RF signals; Radio frequency; Radiofrequency amplifiers; System-on-a-chip; Transceivers;
Conference_Titel :
Custom Integrated Circuits Conference, 2006. CICC '06. IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
1-4244-0075-9
Electronic_ISBN :
1-4244-0076-7
DOI :
10.1109/CICC.2006.320846
